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Core Board Pin Definition

X30CV1 and X30CV2 use a 144-pin stamp-hole layout. Their pins, dimensions, and electrical connections are compatible. The complete pin definition from the hardware manual is retained below for carrier-board design, pin-mux checking, and driver debugging.

X30 core board layout

note

PX30 has limited pins and many multiplexing relationships among display, camera, Ethernet, TF card, and UART. Check pin-mux conflicts before designing the carrier board or editing the device tree.

Core Board Pin Definition 1: Pin 1-36​

Pin No.SignalTypeDescription
1GPIO0_A5GPIO
2GPIO0_C2/I2C1_SCL/UART3_CTSGPIO / I2C / UART3 flow-control
3GPIO0_C3/I2C1_SDA/UART3_RTSGPIO / I2C / UART3 flow-control
4GPIO0_B4/UART0_CTSGPIO / UART0 flow-control
5GPIO0_C0/PWM1/UART3_TXDGPIO / UART3 TXD / PWM
6VCC3V3_LCD3.3V / 3A power output
7LVDS_TX0NLCD interface
8LVDS_TX0PLCD interface
9LVDS_TX1NLCD interface
10LVDS_TX1PLCD interface
11LVDS_CLKNLCD interface
12LVDS_CLKPLCD interface
13LVDS_TX2NLCD interface
14LVDS_TX2PLCD interface
15LVDS_TX3NLCD interface
16LVDS_TX3PLCD interface
17LCDC_CLKLCD interface
18LCDC_HSYNCLCD interface
19LCDC_VSYNCLCD interface
20LCDC_DENLCD interface
21LCDC_D0LCD interface
22LCDC_D1LCD interface
23LCDC_D2LCD interface
24LCDC_D3LCD interface
25LCDC_D4LCD interface
26LCDC_D5LCD interface
27LCDC_D6LCD interface
28LCDC_D7LCD interface
29LCDC_D8LCD interface
30LCDC_D9LCD interface
31LCDC_D10LCD interface
32LCDC_D11LCD interface
33LCDC_D12LCD interface
34LCDC_D13LCD interface
35LCDC_D14LCD interface
36LCDC_D15LCD interface

Core Board Pin Definition 2: Pin 37-72​

Pin No.SignalTypeDescription
37LCDC_D16LCD interface
38LCDC_D17LCD interface
39LCDC_D18LCD interface
40LCDC_D19LCD interface
41LCDC_D20LCD interface
42LCDC_D21LCD interface
43LCDC_D22LCD interface
44LCDC_D23LCD interface
45GPIO0_B5/UART0_RTSGPIO or serial port 0 flow control pin
46GPIO2_B4/UART2_TXDGPIO / UART2 TXD
47GPIO_A0GPIO
48GPIO1_C2/UART1_CTSGPIO / UART1 flow-control
49GPIO1_C0/UART1_RXDGPIO / UART1 RXD
50GPIO1_C1/UART1_TXDGPIO / UART1 TXD
51GPIO1_C3/UART1_RTSGPIO / UART1 flow-control
52CLKOUT_32K32.768 kHz clock output
53GPIO1_C7/SDIO_D1GPIO / SDIO
54GPIO1_C6/SDIO_D0GPIO / SDIO
55GPIO1_C5/SDIO_CLKGPIO / SDIO
56GPIO1_C4/SDIO_CMDGPIO / SDIO
57GPIO1_D1/SDIO_D3GPIO / SDIO
58GPIO1_D0/SDIO_D2GPIO / SDIO
59GPIO0_B3/UART0_RXDGPIO / UART0 RXD
60GPIO0_B2/UART0_TXDGPIO / UART0 RXD
61GPIO0_A1GPIO
62GPIO2_B0GPIO
63GPIO0_A2GPIO
64I2C0_SCL/GPIO0_B0I2C0 / GPIO
65I2C0_SDA/GPIO0_B1I2C0 / GPIO
66GPIO2_C6GPIO
67I2S1_SDO/GPIO2_C4I2S / GPIO
68I2S1_SDI/GPIO2_C5I2S / GPIO
69I2S1_LRCK/GPIO2_C1I2S / GPIO
70I2S1_SCLK/GPIO2_C2I2S / GPIO
71I2S1_MCLK/GPIO2_C3I2S / GPIO
72GNDGND

Core Board Pin Definition 3: Pin 73-108​

Pin No.SignalTypeDescription
73MIC2_INMicrophone input
74MIC1_INMicrophone input
75HP_SNSAudio signal
76HPRAudio signal
77HPLAudio signal
78SPKP_OUTAudio signal
79SPKN_OUTAudio signal
80GNDGND
81MIPI_CSI_D3NMIPI camera signal
82MIPI_CSI_D3PMIPI camera signal
83MIPI_CSI_D2NMIPI camera signal
84MIPI_CSI_D2PMIPI camera signal
85MIPI_CSI_CLKNMIPI camera signal
86MIPI_CSI_CLKPMIPI camera signal
87MIPI_CSI_D1PMIPI camera signal
88MIPI_CSI_D1NMIPI camera signal
89MIPI_CSI_D0PMIPI camera signal
90MIPI_CSI_D0NMIPI camera signal
91CIF_D1/UART2_RXD/GPIO2_B6Parallel camera / UART / GPIO
92CIF_D11/I2C2_SDA/GPIO2_C0Parallel camera / I2C / GPIO
93CIF_D10/I2C2_SCL/GPIO2_B7Parallel camera / I2C / GPIO
94CIF_CLKO/GPIO2_B3Parallel camera / GPIO
95VCC2V8_DVP2.8V power output
96VCC1V8_DVP1.8V power output
97PWM2/GPIO2_B5GPIO / PWM
98CIF_CLKI/RMII_CLK/GPIO2_B2Parallel camera / Ethernet / GPIO
99CIF_HREF/MAC_MDC/GPIO2_B1Parallel camera / Ethernet / GPIO
100CIF_D9/RMII_MDIO/GPIO2_A7Parallel camera / Ethernet / GPIO
101CIF_D8/RMII_RXDV/GPIO2_A6Parallel camera / Ethernet / GPIO
102CIF_D7/RMII_RXER/GPIO2_A5Parallel camera / Ethernet / GPIO
103CIF_D6/RMII_RXD1/GPIO2_A4Parallel camera / Ethernet / GPIO
104CIF_D5/RMII_RXD0/GPIO2_A3Parallel camera / Ethernet / GPIO
105CIF_D4/RMII_TXD0/GPIO2_A2Parallel camera / Ethernet / GPIO
106CIF_D3/RMII_TXD1/GPIO2_A1Parallel camera / Ethernet / GPIO
107CIF_D2/RMII_TXEN/GPIO2_A0Parallel camera / Ethernet / GPIO
108GNDGND

Core Board Pin Definition 4: Pin 109-144​

Pin No.SignalTypeDescription
109VCC5V0_SYSPower input5V / 1A power input
110VCC5V0_SYSPower input5V / 1A power input
111GNDGND
112GNDGND
113EXT_ENEnable trigger signalUsed to trigger external signals
114VCC5V0_HOST5V power output
115VCC_RTC5V power input
116VCC3V3_SYS3.3V / 2.5A power output
117VCC3V0_PMU3V / 400mA power output
118VCC_1V81.8V / 400mA power output
119OTG_DPOTG signal
120OTG_DMOTG signal
121USB_IDOTG signal
122USB_DETOTG signal
123USB_HOST_DMUSB HOST signal
124USB_HOST_DPUSB HOST signal
125FLASH_CS0/GPIO1_B0NAND flash control / GPIO
126FLASH_CLE/UART3_CTS/SPI0_TXD/I2C3_SDA/GPIO1_B4NAND flash control / GPIO / UART / SPI / I2C
127FLASH_WRN/UART3_RTS/SPI0_RXD/I2C3_SCL/GPIO1_B5NAND flash control / GPIO / UART / SPI / I2C
128FLASH_CS1/UART3_TXD/SPI0_CSn/GPIO1_B6NAND flash control / GPIO / UART / SPI
129FLASH_RDN/UART3_RXD/SPI0_CLK/GPIO1_B7NAND flash control / GPIO / UART / SPI
130SDMMC0_D2/UART4_RXD/GPIO1_D4SDIO / GPIO / UART
131SDMMC0_D3/UART4_TXD/GPIO1_D5SDIO / GPIO / UART
132SDMMC0_CMD/UART4_RTS/GPIO1_D7SDIO / GPIO / UART
133VCC_SDLDO outputProgrammable voltage
134SDMMC0_CLK/UART4_CTS/GPIO1_D6SDIO / GPIO / UART
135SDMMC0_D0/UART2_TXD/GPIO1_D2SDIO / GPIO / UART
136SDMMC0_D1/UART2_RXD/GPIO1_D3SDIO / GPIO / UART
137SDMMC0_DET/GPIO0_A3SD-card detect / GPIO
138RESET_KEYPMU reset pinLow level resets the whole power system
139POWER_KEYPMU power key
140ADC0ADC signal
141ADC1ADC signal
142ADC2ADC signal
143UART3_RXD/PWM3/GPIO0_C1UART3 RXD / PWM3 / GPIO
144PWM0/GPIO0_B7PWM0 / GPIO