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Pin Definition

This section lists the pin definition of the I3588 core board. When designing a carrier board, verify multiplexing functions, voltage domains, and power-on default states together with the core board schematic and chip datasheet.

Core Board Pin Definition1​

PinSignalTypeDescription
1UART2_TX_M0/
I2S1_MCLK_M1/
I2C1_SCL_M0/
GPIO0_B5_d
GPIO multiplexed pin, 3.3V
level
default debugging serial port
2UART2_RX_M0/
I2S1_SCLK_M1/
I2C1_SDA_M0/
GPIO0_B6_d
GPIO multiplexed pin, 3.3V
level
default debugging serial port
3SDMMC_DET_L/
GPIO0_A4_u
GPIO multiplexed pin, 1.8V
level
4CAN0_TX_M0/
I2S1_LRCK_M1/
SPI0_CS1_M0/
I2C2_SCL_M0/
PWM0_M0/
GPIO0_B7_d
GPIO multiplexed pin, 3.3V
level
5CAN0_RX_M0/
PDM0_CLK0_M1/
SPI0_MOSI_M0/
I2C2_SDA_M0/
PWM1_M0/
GPIO0_C0_d
GPIO multiplexed pin, 3.3V
level
6HDMIIRX_HPDOUT
_H/
GPIO3_D4_d
GPIO multiplexed pin, 3.3V
level
7HDMITX1_HPDIN_
M0/
GPIO1_A6_d
GPIO multiplexed pin, 1.8V
level
8UART1_RTSN_M2/
PDM0_SDI0_M1/
I2S1_SDI2_M1/
SPI0_MISO_M0/
I2C6_SDA_M0/
PWM6_M0
GPIO0_C7_d
GPIO multiplexed pin, 3.3V
level
9UART1_CTSN_M2/
PDM0_SDI1_M1/
GPIO multiplexed pin, 3.3V
level
10GNDGround
11VCC_3V3_S33.3Vpower output3.3V 2Apower output, can be powered by
on the base board
12VCC_3V3_S33.3Vpower output3.3V 2Apower output, can be powered by
on the base board
13VCC_1V8_S31.8Vpower output1.8V 2Apower output, can be powered by
on the base board
14VCC_1V8_S31.8Vpower output1.8V 2Apower output, can be powered by
on the base board
15VCC4V0_SYS4Vmain power input4V input, current is determined by CPU
workload, it is recommended not to
less than 5A
16VCC4V0_SYS4Vmain power input4V input, current is determined by CPU
workload, it is recommended not to
less than 5A
17GNDGround
18GNDGround
19LCD_RST_H/
GPIO4_B0_d
GPIO, 3.3V level
20TYPEC0_USB20_OT
G_ID
TypeC0 dedicated OTG detection pin
Cannot be used as GPIO port
21TYPEC0_USB20_VB
USDET
TypeC0 dedicated VBUS
detection pin
Cannot be used as GPIO port
22PWRON_LPMU enable pinactive low enable
23SDMMC0_CLK/
GPIO4_D5_d
GPIO multiplexed pin, the level
is determined by the
PLDO5 level of the program control PMU, the default
is 3.3V
24SDMMC0_CMD/
GPIO4_D4_u
GPIO multiplexed pin, the level
is determined by the
PLDO5 level of the program control PMU, the default
is 3.3V
25SDMMC0_D3/
GPIO4_D3_u
GPIO multiplexed pin, the level
is determined by the
PLDO5 level of the program control PMU, the default
is 3.3V
26SDMMC0_D2/GPIO multiplexed pin, level
27SDMMC0_D1/
GPIO4_D1_u
GPIO multiplexed pin, the level
is determined by the
PLDO5 level of the program control PMU, the default
is 3.3V
28SDMMC0_D0/
GPIO4_D0_u
GPIO multiplexed pin, the level
is determined by the
PLDO5 level of the program control PMU, the default
is 3.3V
29GNDGround
30HDMI_RX_D0NHDMI RX2.0differential pairCannot be used as GPIO port
31HDMI_RX_D0PHDMI RX2.0differential pairCannot be used as GPIO port
32HDMI_RX_CLKNHDMI RX2.0differential pairCannot be used as GPIO port
33HDMI_RX_CLKPHDMI RX2.0differential pairCannot be used as GPIO port
34HDMI_RX_D2NHDMI RX2.0differential pairCannot be used as GPIO port
35HDMI_RX_D2PHDMI RX2.0differential pairCannot be used as GPIO port
36GNDGround
37HDMI0_TX0N_POR
T/EDP0_TX_D0N
HDMI0/EDP0 differential
pair, controlled by program
Cannot be used as GPIO port
38HDMI0_TX0P_PORT
/EDP0_TX_D0P
HDMI0/EDP0 differential
pair, controlled by program
Cannot be used as GPIO port
39HDMI0_TX1N_POR
T/EDP0_TX_D1N
HDMI0/EDP0 differential
pair, controlled by program
Cannot be used as GPIO port
40HDMI0_TX1P_PORT
/EDP0_TX_D1P
HDMI0/EDP0 differential
pair, controlled by program
Cannot be used as GPIO port
41HDMI0_TX2P_PORT
/EDP0_TX_D2P
HDMI0/EDP0 differential
pair, controlled by program
Cannot be used as GPIO port
42HDMI0_TX2N_POR
T/EDP0_TX_D2N
HDMI0/EDP0 differential
pair, controlled by program
Cannot be used as GPIO port
43HDMI0_TX3P_PORT
/EDP0_TX_D3P
HDMI0/EDP0 differential
pair, controlled by program
Cannot be used as GPIO port
44HDMI0_TX3N_POR
T/EDP0_TX_D3N
HDMI0/EDP0 differential
pair, controlled by program
Cannot be used as GPIO port
45HDMI0_TX_SBDP/E
DP0_TX_AUXP
HDMI0/EDP0 differential
pair, controlled by program
Cannot be used as GPIO port
46HDMI0_TX_SBDN/E
DP0_TX_AUXN
HDMI0/EDP0 differential
pair, controlled by program
Cannot be used as GPIO port
47HDMI_RX_D1PHDMI RX2.0differential pairCannot be used as GPIO port
48HDMI_RX_D1NHDMI RX2.0differential pairCannot be used as GPIO port
49HDMI_RX_SDA_M1GPIO multiplexed pin, 3.3V
50HDMI_RX_SCL_M1/
GPIO3_D2_d
GPIO multiplexed pin, 3.3V
level
51HDMI_RX_CEC/
GPIO3_D1_d
GPIO multiplexed pin, 3.3V
level
52HDMITX1_SCL_M1/
GPIO3_C6_u
GPIO multiplexed pin, 3.3V
level
53HDMITX1_SDA_M1
/ GPIO3_C5_u
GPIO multiplexed pin, 3.3V
level
54I2C5_SDA_M0_MIPI
/ GPIO3_D0_u
GPIO multiplexed pin, 3.3V
level
55I2C5_SCL_M0_MIPI/
GPIO3_C7_u
GPIO multiplexed pin, 3.3V
level
56HDMITX0_SDA_M0
/GPIO4_C0_u
GPIO multiplexed pin, 3.3V
level
57HDMI1_TX_ON_H/
GPIO4_B2_u
GPIO multiplexed pin, 3.3V
level
58HDMI0_TX_ON_H/
GPIO4_B1_u
GPIO multiplexed pin, 3.3V
level
59HDMITX0_CEC_M0/
GPIO4_C1_d
GPIO multiplexed pin, 3.3V
level
60HDMITX1_CEC_M2/
GPIO3_C4_u
GPIO multiplexed pin, 3.3V
level
61HDMITX0_SCL_M0/
GPIO4_B7_u
GPIO multiplexed pin, 3.3V
level
62PCIE30X4_PERSTN_
M1_L/GPIO4_B6_d
GPIO multiplexed pin, 3.3V
level
63PCIE30X4_PRSNT_L
/GPIO4_B3_u
GPIO multiplexed pin, 3.3V
level
64PCIE30X4_CLKREQ
N_M1_L/GPIO4_B4_
u
GPIO multiplexed pin, 3.3V
level
65PCIE30X4_WAKEN_
M1_L/GPIO4_B5_d
GPIO multiplexed pin, 3.3V
level
66PCIEX1_0_WAKEN_
M1_L/GPIO4_A4_d
GPIO multiplexed pin, 3.3V
level
67PCIEX1_0_PERSTN_
M1_L/GPIO4_A5_d
GPIO multiplexed pin, 3.3V
level
68PCIEX1_0_CLKREQ
N_M1_L/GPIO4_A3_
d
GPIO multiplexed pin, 3.3V
level
69PCIEX1_1_CLKREQGPIO multiplexed pin, 3.3V
70PCIEX1_1_WAKEN_
M1_L/GPIO4_A1_d
GPIO multiplexed pin, 3.3V
level
71PCIEX1_1_PERSTN_
M1_L/GPIO4_A2_d
GPIO multiplexed pin, 3.3V
level
72GSENSOR_INT_L/
GPIO4_C2_d
GPIO multiplexed pin, 1.8V
level
73LCD_BL_EN_H/
GPIO2_C1_d
GPIO multiplexed pin, 1.8V
level
74RESET_Lreset pin
75I2C3_SCL_M0_MIPI/
GPIO1_C1_z
GPIO multiplexed pin, 1.8V
level
76I2C3_SDA_M0_MIPI
/GPIO1_C0_z
GPIO multiplexed pin, 1.8V
level
77I2C7_SDA_M0_COD
EC/GPIO1_D1_d
GPIO multiplexed pin, 1.8V
level
78I2C7_SCL_M0_COD
EC//GPIO1_D0_d
GPIO multiplexed pin, 1.8V
level
79WIFI_WAKE_HOST
_H/GPIO0_B2_u
GPIO multiplexed pin, 1.8V
level
80GNDGround

Core Board Pin Definition2​

PinSignalTypeDescription
81PCIE30_PORT1_TX2
P
PCIE3.0differential pairNot available as GPIO
82PCIE30_PORT1_TX2
N
PCIE3.0differential pairNot available as GPIO
83PCIE30_PORT1_TX3
P
PCIE3.0differential pairNot available as GPIO
84PCIE30_PORT1_TX3
N
PCIE3.0differential pairNot available as GPIO
85PCIE30_PORT1_REF
CLKN_IN
PCIE3.0differential pairNot available as GPIO
86PCIE30_PORT1_REF
CLKP_IN
PCIE3.0differential pairNot available as GPIO
87GNDGround
88PCIE30_PORT0_TX1
N
PCIE3.0differential pairNot available as GPIO
89PCIE30_PORT0_TX1PCIE3.0differential pairNot available as GPIO
90PCIE30_PORT0_TX0
N
PCIE3.0differential pairNot available as GPIO
91PCIE30_PORT0_TX0
P
PCIE3.0differential pairNot available as GPIO
92PCIE30_PORT0_REF
CLKN_IN
PCIE3.0differential pairNot available as GPIO
93PCIE30_PORT0_REF
CLKP_IN
PCIE3.0differential pairNot available as GPIO
94GNDGround
95MIPI_CAM4_CLKO
UT/GPIO1_D7_u
GPIO multiplexed pin, 1.8V
level
96MIPI_CAM3_CLKO
UT/GPIO1_D6_u
GPIO multiplexed pin, 1.8V
level
97MIPI_CAM2_CLKO
UT/GPIO1_B7_u
GPIO multiplexed pin, 1.8V
level
98MIPI_CAM1_CLKO
UT/GPIO1_B6_u
GPIO multiplexed pin, 1.8V
level
99MIPI_CAM2_PDN_L
/GPIO1_A4_d
GPIO multiplexed pin, 1.8V
level
100MIPI_CAM3_PDN_L
/GPIO1_A7_u
GPIO multiplexed pin, 1.8V
level
101MIPI_CAM4_PWRE
N_H/ GPIO1_B1_d
GPIO multiplexed pin, 1.8V
level
102MIPI_CAM3_PWRE
N_H/ GPIO1_B2_d
GPIO multiplexed pin, 1.8V
level
103HDMITX0_HPDIN_
M0/GPIO1_A5_d
GPIO multiplexed pin, 1.8V
level
104HDMIIRX_DET_L/
GPIO1_D5_d
GPIO multiplexed pin, 1.8V
level
105UART7_TX_M2/
GPIO1_B5_u
GPIO multiplexed pin, 1.8V
level
106UART7_RX_M2/
GPIO1_B4_u
GPIO multiplexed pin, 1.8V
level
107SDIO_D3_M0_WIFI/
GPIO2_B1_u
GPIO multiplexed pin, 1.8V
level
108SDIO_CMD_M0_WI
FI/ GPIO2_B2_u
GPIO multiplexed pin, 1.8V
level
109SDIO_D0_M0_WIFI/
UART6_RX_M0/
GPIO2_A6_u
GPIO multiplexed pin, 1.8V
level
110SDIO_D1_M0_WIFI/GPIO multiplexed pin, 1.8V
111SDIO_CLK_M0_WIF
I/ GPIO2_B3_d
GPIO multiplexed pin, 1.8V
level
112SDIO_D2_M0_WIFI/
GPIO2_B0_u
GPIO multiplexed pin, 1.8V
level
113TYPEC5V_PWREN_
H/GPIO4_C6_d
GPIO multiplexed pin, 1.8V
level
114DP1_HPDIN_M0/
GPIO3_D5_d
GPIO multiplexed pin, 3.3V
level
115UART9_CTSN_M0_
BT/ GPIO4_C5_d
GPIO multiplexed pin, 1.8V
level
116PWM15_M2/
GPIO1_C6_d
GPIO multiplexed pin, 1.8V
level
117UART9_RTSN_M0_
BT/ GPIO4_C4_d
GPIO multiplexed pin, 1.8V
level
118HP_DET_L/
GPIO1_C4_d
GPIO multiplexed pin, 1.8V
level
11932KOUT_WIFIAnalog 32768Hz clock output
Cannot be used as GPIO port
120VCC_RTCRTCpower inputExternal 3V button battery input
121GNDGround
122GNDGround
123GNDGround
124TP_RST_L/
GPIO3_C1_d
GPIO multiplexed pin, 3.3V
level
125TP_INT_L/
GPIO3_C0_d
GPIO multiplexed pin, 3.3V
level
126HOST_WAKE_BT_H
/GPIO0_C5_u
GPIO multiplexed pin, 3.3V
level
127BT_WAKE_HOST_H
/GPIO0_A0_d
GPIO multiplexed pin, 1.8V
level
128I2C4_SDA_M1_SEN
SOR/GPIO2_B4_u
GPIO multiplexed pin, 1.8V
level
129I2C4_SCL_M1_SEN
SOR/ GPIO2_B5_u
GPIO multiplexed pin, 1.8V
level
130PCIE_PWREN_H/
GPIO2_C5_d
GPIO multiplexed pin, 1.8V
level
131CC_INT_L/
GPIO0_D3_u
GPIO multiplexed pin, 3.3V
level
132WIFI_REG_ON_H/
GPIO0_C4_d
GPIO multiplexed pin, 3.3V
level
133GPIO3_B2_dGPIO multiplexed pin, 3.3V
level
134BT_REG_ON_H/
GPIO0_C6_u
GPIO multiplexed pin, 3.3V
level
135I2S0_SCLK_TX/
GPIO1_C3_d
GPIO multiplexed pin, 1.8V
level
136I2S0_MCLK/
GPIO1_C2_d
GPIO multiplexed pin, 1.8V
level
137I2S0_LRCK_TX/
GPIO1_C5_d
GPIO multiplexed pin, 1.8V
level
138I2S0_SDO0/
GPIO1_C7_d
GPIO multiplexed pin, 1.8V
level
139I2S0_SDI0/
GPIO1_D4_d
GPIO multiplexed pin, 1.8V
level
140MIPI_CAM4_PDN_L
/GPIO1_B0_u
GPIO multiplexed pin, 1.8V
level
141MIPI_CAM1/2_RESE
T_L/GPIO1_A3_d
GPIO multiplexed pin, 1.8V
level
142MIPI_CAM3/4_RESE
T_L/GPIO2_B6_d
GPIO multiplexed pin, 1.8V
level
143MIPI_CAM1_PDN_L
/ GPIO1_A2_d
GPIO multiplexed pin, 1.8V
level
144MIPI_CAM2_PWRE
N_H/GPIO1_D3_d
GPIO multiplexed pin, 1.8V
level
145MIPI_CAM1_PWRE
N_H/ GPIO1_D2_d
GPIO multiplexed pin, 1.8V
level
146UART9_TX_M0_BT/
GPIO2_C2_d
GPIO multiplexed pin, 1.8V
level
147UART9_RX_M0_BT/
GPIO2_C4_d
GPIO multiplexed pin, 1.8V
level
148GPIO1_B3_dGPIO multiplexed pin, 1.8V
level
149UART6_RX_M1/
GPIO1_A0_d
GPIO multiplexed pin, 1.8V
level
150UART6_TX_M1/
GPIO1_A1_d
GPIO multiplexed pin, 1.8V
level
151GNDGround
152PCIE30_PORT0_RX0
P
PCIE3.0differential pairCannot be used as GPIO port
153PCIE30_PORT0_RX0
N
PCIE3.0differential pairCannot be used as GPIO port
154PCIE30_PORT0_RX1PCIE3.0differential pairCannot be used as GPIO port
155PCIE30_PORT0_RX1
N
PCIE3.0differential pairCannot be used as GPIO port
156GNDGround
157PCIE30_PORT1_RX3
N
PCIE3.0differential pairCannot be used as GPIO port
158PCIE30_PORT1_RX3
P
PCIE3.0differential pairCannot be used as GPIO port
159PCIE30_PORT1_RX2
N
PCIE3.0differential pairCannot be used as GPIO port
160PCIE30_PORT1_RX2
P
PCIE3.0differential pairCannot be used as GPIO port

Core Board Pin Definition3​

PinSignalTypeDescription
161MIPI_DPHY0_RX_C
LKN
MIPI CSI0differential pairCannot be used as GPIO port
162MIPI_DPHY0_RX_C
LKP
MIPI CSI0differential pairCannot be used as GPIO port
163MIPI_DPHY0_RX_D
2N
MIPI CSI0differential pairCannot be used as GPIO port
164MIPI_DPHY0_RX_D
2P
MIPI CSI0differential pairCannot be used as GPIO port
165MIPI_DPHY0_RX_D
3N
MIPI CSI0differential pairCannot be used as GPIO port
166MIPI_DPHY0_RX_D
3P
MIPI CSI0differential pairCannot be used as GPIO port
167GNDGround
168ETH1_REFCLKO_25
M/GPIO3_A6_d
GPIO multiplexed pin, 3.3V
level
169GMAC1_RXCLK/
GPIO3_A5_d
GPIO multiplexed pin, 3.3V
level
170GMAC1_RXDV_CR
S/ GPIO3_B1_d
GPIO multiplexed pin, 3.3V
level
171GMAC1_RXD0/
GPIO3_A7_u
GPIO multiplexed pin, 3.3V
level
172GMAC1_RXD1/
GPIO3_B0_u
GPIO multiplexed pin, 3.3V
level
173GMAC1_RXD2/
GPIO3_A2_u
GPIO multiplexed pin, 3.3V
level
174GMAC1_RXD3/GPIO multiplexed pin, 3.3V
175GMAC1_MCLKINO
UT/ GPIO3_B6_d
GPIO multiplexed pin, 3.3V
level
176GMAC1_TXCLK/
GPIO3_A4_d
GPIO multiplexed pin, 3.3V
level
177GMAC1_TXEN/
GPIO3_B5_u
GPIO multiplexed pin, 3.3V
level
178GMAC1_TXD0/
GPIO3_B3_u
GPIO multiplexed pin, 3.3V
level
179GMAC1_TXD1/
GPIO3_B4_u
GPIO multiplexed pin, 3.3V
level
180GMAC1_TXD2/
GPIO3_A0_u
GPIO multiplexed pin, 3.3V
level
181GMAC1_TXD3/
GPIO3_A1_u
GPIO multiplexed pin, 3.3V
level
182GMAC1_MDIO/
GPIO3_C3_d
GPIO multiplexed pin, 3.3V
level
183GMAC1_MDC/
GPIO3_C2_d
GPIO multiplexed pin, 3.3V
level
184GMAC1_RSTN_L/
GPIO3_B7_d
GPIO multiplexed pin, 3.3V
level
185GNDGround
186I2S2_LRCK_M0_BT/
GPIO2_C0_d
GPIO multiplexed pin, 1.8V
level
187I2S2_SCLK_M0_BT/
GPIO2_B7_d
GPIO multiplexed pin, 1.8V
level
188I2S2_SDI_M0_BT/
GPIO2_C3_d
GPIO multiplexed pin, 1.8V
level
189I2S2_SDO_M0_BT/
GPIO4_C3_d
GPIO multiplexed pin, 1.8V
level
190GNDGround
191PCIE20_0_TXPPCIE2.0differential pairCannot be used as GPIO port
192PCIE20_0_TXNPCIE2.0differential pairCannot be used as GPIO port
193PCIE20_1_RXP/SAT
A30_1_RXP
PCIE2.0/SATA3.0 difference
pair
Cannot be used as GPIO port
194PCIE20_1_RXN/SAT
A30_1_RXN
PCIE2.0/SATA3.0 difference
pair
Cannot be used as GPIO port
195PCIE20_2_RXP/SAT
A30_2_RXP
PCIE2.0/SATA3.0 difference
pair
Cannot be used as GPIO port
196PCIE20_2_RXN/SAT
A30_2_RXN
PCIE2.0/SATA3.0 difference
pair
Cannot be used as GPIO port
197PCIE20_2_TXP/SATPCIE2.0/SATA3.0 poorCannot be used as GPIO port
198PCIE20_2_TXN/SAT
A30_2_TXN
PCIE2.0/SATA3.0 difference
pair
Cannot be used as GPIO port
199PCIE20_2_REFCLKPPCIE2.0differential pairCannot be used as GPIO port
200PCIE20_2_REFCLK
N
PCIE2.0differential pairCannot be used as GPIO port
201PCIE20_1_REFCLK
N
PCIE2.0differential pairCannot be used as GPIO port
202PCIE20_1_REFCLKPPCIE2.0differential pairCannot be used as GPIO port
203PCIE20_1_TXN/SAT
A30_1_TXN
PCIE2.0/SATA3.0 difference
pair
Cannot be used as GPIO port
204PCIE20_1_TXP/SAT
A30_1_TXP
PCIE2.0/SATA3.0 difference
pair
Cannot be used as GPIO port
205SATA30_0_TXPSATA3.0differential pairCannot be used as GPIO port
206SATA30_0_TXNSATA3.0differential pairCannot be used as GPIO port
207SATA30_0_RXNSATA3.0differential pairCannot be used as GPIO port
208SATA30_0_RXPSATA3.0differential pairCannot be used as GPIO port
209GNDGround
210GNDGround
211MIPI_CSI1_RX_D0PMIPI CSI1differential pairCannot be used as GPIO port
212MIPI_CSI1_RX_D0NMIPI CSI1differential pairCannot be used as GPIO port
213MIPI_CSI1_RX_D1PMIPI CSI1differential pairCannot be used as GPIO port
214MIPI_CSI1_RX_D1NMIPI CSI1differential pairCannot be used as GPIO port
215MIPI_CSI1_RX_CLK
0P
MIPI CSI1differential pairCannot be used as GPIO port
216MIPI_CSI1_RX_CLK
0N
MIPI CSI1differential pairCannot be used as GPIO port
217MIPI_CSI1_RX_D2PMIPI CSI1differential pairCannot be used as GPIO port
218MIPI_CSI1_RX_D2NMIPI CSI1differential pairCannot be used as GPIO port
219MIPI_CSI1_RX_D3PMIPI CSI1differential pairCannot be used as GPIO port
220MIPI_CSI1_RX_D3NMIPI CSI1differential pairCannot be used as GPIO port
221MIPI_CSI1_RX_CLK
1P
MIPI CSI1differential pairCannot be used as GPIO port
222MIPI_CSI1_RX_CLK
1N
MIPI CSI1differential pairCannot be used as GPIO port
223GNDGround
224MIPI_CSI0_RX_D0NMIPI CSI0differential pairCannot be used as GPIO port
225MIPI_CSI0_RX_D0PMIPI CSI0differential pairCannot be used as GPIO port
226MIPI_CSI0_RX_D1NMIPI CSI0differential pairCannot be used as GPIO port
227MIPI_CSI0_RX_D1PMIPI CSI0differential pairCannot be used as GPIO port
228MIPI_CSI0_RX_CLK
0N
MIPI CSI0differential pairCannot be used as GPIO port
229MIPI_CSI0_RX_CLK
0P
MIPI CSI0differential pairCannot be used as GPIO port
230MIPI_CSI0_RX_D2NMIPI CSI0differential pairCannot be used as GPIO port
231MIPI_CSI0_RX_D2PMIPI CSI0differential pairCannot be used as GPIO port
232MIPI_CSI0_RX_D3NMIPI CSI0differential pairCannot be used as GPIO port
233MIPI_CSI0_RX_D3PMIPI CSI0differential pairCannot be used as GPIO port
234MIPI_CSI0_RX_CLK
1N
MIPI CSI0differential pairCannot be used as GPIO port
235MIPI_CSI0_RX_CLK
1P
MIPI CSI0differential pairCannot be used as GPIO port
236GNDGround
237MIPI_DPHY0_RX_D
1P
MIPI DPHY0differential pairCannot be used as GPIO port
238MIPI_DPHY0_RX_D
1N
MIPI DPHY0differential pairCannot be used as GPIO port
239MIPI_DPHY0_RX_D
0P
MIPI DPHY0differential pairCannot be used as GPIO port
240MIPI_DPHY0_RX_D
0N
MIPI DPHY0differential pairCannot be used as GPIO port

Core Board Pin Definition4​

PinSignalTypeDescription
241USB20_HOST0_DPHOST2.0differential pairCannot be used as GPIO port
242USB20_HOST0_DMHOST2.0differential pairCannot be used as GPIO port
243USB20_HOST1_DPHOST2.0differential pairCannot be used as GPIO port
244USB20_HOST1_DMHOST2.0differential pairCannot be used as GPIO port
245TYPEC1_OTG_DPTYPECdifferential pairCannot be used as GPIO port
246TYPEC1_OTG_DMTYPECdifferential pairCannot be used as GPIO port
247DP1_AUXPTYPECdifferential pairCannot be used as GPIO port
248DP1_AUXNTYPECdifferential pairCannot be used as GPIO port
249DP1_TX2NTYPECdifferential pairCannot be used as GPIO port
250DP1_TX2PTYPECdifferential pairCannot be used as GPIO port
251DP1_TX3PTYPECdifferential pairCannot be used as GPIO port
252DP1_TX3NTYPECdifferential pairCannot be used as GPIO port
253GNDGround
254TYPEC0_OTG_DPTYPECdifferential pairCannot be used as GPIO port
255TYPEC0_OTG_DMTYPECdifferential pairCannot be used as GPIO port
256TYPEC0_SBU1TYPECdifferential pairCannot be used as GPIO port
257TYPEC0_SBU2TYPECdifferential pairCannot be used as GPIO port
258TYPEC0_SSRX2NTYPECdifferential pairCannot be used as GPIO port
259TYPEC0_SSRX2PTYPECdifferential pairCannot be used as GPIO port
260TYPEC0_SSTX2PTYPECdifferential pairCannot be used as GPIO port
261TYPEC0_SSTX2NTYPECdifferential pairCannot be used as GPIO port
262BOOT_SARADC_IN
0
ADC0 channel, multiplexed on
to force MASKROM mode
program programming, low level
is valid
263SARADC_VIN1ADC1 channel, multiplexed in
upgrade mode program programming,
active low
264SARADC_VIN6ADC6 channel
265SARADC_VIN4ADC4 channels
266GNDGround
267MIPI_DPHY1_RX_D
0N
MIPI DPHY1differential pairCannot be used as GPIO port
268MIPI_DPHY1_RX_D
0P
MIPI DPHY1differential pairCannot be used as GPIO port
269MIPI_DPHY1_RX_D
1N
MIPI DPHY1differential pairCannot be used as GPIO port
270MIPI_DPHY1_RX_D
1P
MIPI DPHY1differential pairCannot be used as GPIO port
271MIPI_DPHY1_RX_C
LKN
MIPI DPHY1differential pairCannot be used as GPIO port
272MIPI_DPHY1_RX_C
LKP
MIPI DPHY1differential pairCannot be used as GPIO port
273MIPI_DPHY1_RX_D
2N
MIPI DPHY1differential pairCannot be used as GPIO port
274MIPI_DPHY1_RX_D
2P
MIPI DPHY1differential pairCannot be used as GPIO port
275MIPI_DPHY1_RX_D
3N
MIPI DPHY1differential pairCannot be used as GPIO port
276MIPI_DPHY1_RX_D
3P
MIPI DPHY1differential pairCannot be used as GPIO port
277MIPI_DPHY0_TX_D
3N
MIPI DPHY1differential pairCannot be used as GPIO port
278MIPI_DPHY0_TX_D
3P
MIPI DPHY1differential pairCannot be used as GPIO port
279MIPI_DPHY0_TX_D
2N
MIPI DPHY1differential pairCannot be used as GPIO port
280MIPI_DPHY0_TX_D
2P
MIPI DPHY1differential pairCannot be used as GPIO port
281MIPI_DPHY0_TX_C
LKP
MIPI DPHY1differential pairCannot be used as GPIO port
282MIPI_DPHY0_TX_C
LKN
MIPI DPHY1differential pairCannot be used as GPIO port
283MIPI_DPHY0_TX_D
1P
MIPI DPHY1differential pairCannot be used as GPIO port
284MIPI_DPHY0_TX_D
1N
MIPI DPHY1differential pairCannot be used as GPIO port
285MIPI_DPHY0_TX_D
0P
MIPI DPHY1differential pairCannot be used as GPIO port
286MIPI_DPHY0_TX_D
0N
MIPI DPHY1differential pairCannot be used as GPIO port
287GNDGround
288MIPI_DPHY1_TX_D
3P
MIPI DPHY1differential pairCannot be used as GPIO port
289MIPI_DPHY1_TX_D
3N
MIPI DPHY1differential pairCannot be used as GPIO port
290MIPI_DPHY1_TX_D
2P
MIPI DPHY1differential pairCannot be used as GPIO port
291MIPI_DPHY1_TX_D
2N
MIPI DPHY1differential pairCannot be used as GPIO port
292MIPI_DPHY1_TX_C
LKP
MIPI DPHY1differential pairCannot be used as GPIO port
293MIPI_DPHY1_TX_C
LKN
MIPI DPHY1differential pairCannot be used as GPIO port
294MIPI_DPHY1_TX_D
1P
MIPI DPHY1differential pairCannot be used as GPIO port
295MIPI_DPHY1_TX_D
1N
MIPI DPHY1differential pairCannot be used as GPIO port
296MIPI_DPHY1_TX_D
0P
MIPI DPHY1differential pairCannot be used as GPIO port
297MIPI_DPHY1_TX_D
0N
MIPI DPHY1differential pairCannot be used as GPIO port
298SARADC_VIN5ADC5 channel
299SARADC_VIN3ADC3 channel
300SARADC_VIN2ADC2 channel
301TYPEC0_SBU2_DCTYPECdifferential pairCannot be used as GPIO port
302TYPEC0_SBU1_DCTYPECdifferential pairCannot be used as GPIO port
303TYPEC0_SSTX1NTYPECdifferential pairCannot be used as GPIO port
304TYPEC0_SSTX1PTYPECdifferential pairCannot be used as GPIO port
305TYPEC0_SSRX1PTYPECdifferential pairCannot be used as GPIO port
306TYPEC0_SSRX1NTYPECdifferential pairCannot be used as GPIO port
307TYPEC1_SSTX1NTYPECdifferential pairCannot be used as GPIO port
308TYPEC1_SSTX1PTYPECdifferential pairCannot be used as GPIO port
309TYPEC1_SSRX1PTYPECdifferential pairCannot be used as GPIO port
310TYPEC1_SSRX1NTYPECdifferential pairCannot be used as GPIO port
311HDMI1_TX2N_POR
T/EDP1_TX_D2N
HDMI/EDP differential pair,
configured through program
Do not use
as a general-purpose GPIO
312HDMI1_TX2P_PORT
/EDP1_TX_D2P
HDMI/EDP differential pair,
configured through program
Do not use
as a general-purpose GPIO
313HDMI1_TX1N_POR
T/EDP1_TX_D1N
HDMI/EDP differential pair,
configured through program
Do not use
as a general-purpose GPIO
314HDMI1_TX1P_PORT
/EDP1_TX_D1P
HDMI/EDP differential pair,
configured through program
Do not use
as a general-purpose GPIO
315HDMI1_TX0N_POR
T/EDP1_TX_D0N
HDMI/EDP differential pair,
configured through program
Do not use
as a general-purpose GPIO
316HDMI1_TX0P_PORT
/EDP1_TX_D0P
HDMI/EDP differential pair,
configured through program
Do not use
as a general-purpose GPIO
317HDMI1_TX3N_POR
T/EDP1_TX_D3N
HDMI/EDP differential pair,
configured through program
Do not use
as a general-purpose GPIO
318HDMI1_TX3P_PORT
/EDP1_TX_D3P
HDMI/EDP differential pair,
configured through program
Do not use
as a general-purpose GPIO
319HDMI1_TX_SBDN/
EDP1_TX_AUXN
HDMI/EDP differential pair,
configured through program
Do not use
as a general-purpose GPIO
320HDMI1_TX_SBDP/
EDP1_TX_AUXP
HDMI/EDP differential pair,
configured through program
Do not use
as a general-purpose GPIO